Reports To: Manager, ASIC Verification
Location: Maynard, MA
FLSA Status: Exempt
The ASIC Design Verification Engineer will be a member of a small, multi-disciplinary team working on next generation 100G-1T coherent optical communications products. His/her primary role will be to write and execute verification test plans for large, highly complex ASICs that are used in these next generation telecom systems.
This engineer must be able to operate independently with minimal supervision in a fast-paced, dynamic and highly technical start-up environment. A successful candidate will be highly self-motivated, collaborative and passionate about delivering the most advanced high speed optical products in the world. Knowledge of object-oriented verification methodologies is required.
Key Essential Functions:
Develop detailed and comprehensive test plans
Develop verification test benches
Timely execution of test plans
Participate in, and assist in, FPGA emulation efforts
Assist chip level design tradeoffs by working with design engineers
Participate in review of design verification coding and coverage metrics
Minimum Qualifications, Experience, Skills, Education and Certifications:
Bachelors or Masters degree majoring in Computer Science, Computer Engineering, or Electronic or Electrical Engineering with 5 or more years of experience.
Experience with the latest ASIC verification methodologies, tools and scripting/programming languages
Must be fluent in Verilog, C, and/or C++
Knowledge of SystemVerilog/UVM or SystemC is a plus
Knowledge of DSP algorithms and modulation techniques such as QAM is a plus
Lab silicon validation experience is a plus
Proven track record of a high level of innovation
Self-motivation and the ability to execute effectively without supervision